1. Field of the Invention
The present invention relates to amorphous carbon metal-to-metal antifuse structures. More particularly, the present invention relates to amorphous carbon metal-to-metal antifuse structures employing adhesion layers for preventing amorphous carbon thin film peeling.
2. The Background Art
Integrated electronic circuits are typically fabricated with all internal connections set during the manufacturing process. However, because of high development costs and high manufacturing tooling costs of such circuits, it is advantageous for integrated circuits to be configured or programmed by the user to implement a desired application. Such circuits are called programmable circuits, and antifuses are known in the art for providing the programmability of these circuits. Antifuses are devices which generally comprise a pair of conductive electrodes sandwiched about an insulating antifuse material layer.
A programming process disrupts the antifuse material and forms a filament between the two electrodes. Prior to programming, antifuses exhibit a resistance of a few gigaohms between the two electrodes and may be considered to be open circuits. The programming process creates a low-impedance connection of a few ohms to a few thousand ohms between the two electrodes. Programming voltages range from a few volts to about 20 volts.
It is known in the art that antifuses have been fabricated where the electrodes have been selected from a number of different electrically conductive layer materials, and the antifuse material layer has been fabricated from a number of different insulating materials. It is also known that many different antifuse structures have been proposed, including, “via” type, half-stacks, full stacks, conductive plugs and numerous other variations.
Antifuses are generally classified into two categories. A first type of antifuse, referred to as a substrate antifuse, has a doped region in a semiconductor substrate as its lower electrode and a layer of metal or doped polysilicon as its upper electrode. The antifuse material typically comprises one or more layers of silicon nitride or silicon dioxide. An example of such an antifuse is made of an oxide-nitride-oxide (ONO) antifuse material layer sandwiched between an N+ diffusion layer and a polysilicon (“Poly”) layer (N+/ONO/Poly). Such a device is described in detail in U.S. Pat. Nos. 4,823,181 and 4,881,114. For this category of antifuse, contacts have to be made to the N+ diffusion layer and the upper electrode from two corresponding conductive metal lines.
There are known problems with substrate level antifuses. Some of the suggested dielectric materials require complex manufacturing techniques and have low reliability during programming. Some programmed antifuses may have a finite resistance on the order of several hundred to several thousand ohms which may render them relatively unsuitable for use in high speed circuits, and also result in high power consumption when a large number of circuits are switching simultaneously. Further, to maintain reliable operation at commercially acceptable voltages, proposed antifuse material layers are typically thin enough to produce a relatively high capacitance. This can place a limit on device operating speed because antifuses on a single line act as capacitors linked in parallel, such that the sum of the individual capacitances of the unprogrammed antifuses can slow data signals undesirably. Finally, substrate antifuses consume a lot of chip area.
A second type of antifuse, referred to as a metal-to-metal antifuse has a first metal layer disposed above and insulated from a semiconductor substrate as its lower electrode, a second metal layer as its upper electrode, and an antifuse material layer sandwiched between the first and second layers of metal. The antifuse material layer may be accompanied by one or more barrier metal layers separating it from lower and upper metal interconnect layers. Numerous structures for metal-to-metal antifuses are known in the art. Illustrative and non-exhaustive examples of metal-to-metal antifuses are shown in U.S. Pat. No. 5,272,101 to Forouhi et al.
The resistance of a programmed metal-to-metal antifuse is typically much lower than a programmed substrate level antifuse. During programming of a metal-to-metal antifuse, the metallization layers in the vicinity of the antifuse, the antifuse material layer and a portion of the adjacent metallization layers will disrupt and/or melt, and a conductive link will form through the antifuse material layer due to metal from the adjacent metallization layer being drawn in and intermixed through mass transport and thermal driven material diffusion and chemical reaction.
Metal-to-metal antifuses usually employ a layer of amorphous silicon as the antifuse material, however, they may also employ oxide and nitride layers either alone or in multilayer combinations, or in combinations with amorphous silicon. Examples of antifuses that have been suggested using one or more oxide or nitride layers as antifuse material layers include U.S. Pat. No. 4,543,594 to Mohsen et al., U.S. Pat. No. 4,823,181 to Mohsen et al., U.S. Pat. No. 4,899,205 to Hamdy et al. Examples of antifuses that have been suggested using amorphous silicon as an antifuse material layer, either by itself, or in combination with one or more oxide or nitride layers include U.S. Pat. No. 5,070,384 to McCollum et al., U.S. Pat. No. 5,171,715 to Husher et al., and U.S. Pat. No. 5,181,096 to Forouhi et al., U.S. Pat. No. 5,272,101 to Forouhi et al., and U.S. Pat. No. 5,196,724 to Gordon.
Antifuse capacitance, as described above, is also a problem for metal-to-metal antifuses. Amorphous silicon antifuses alleviate this problem by providing a relatively thick antifuse layer, however, amorphous silicon antifuses exhibit relatively high leakage currents. Another approach has been to form a leakage barrier between the electrodes and the amorphous silicon antifuse material. A thin layer of deposited silicon dioxide or silicon nitride has been used. If this layer is too thin, it will not be an effective barrier, and if it is too thick, it will appreciably raise the programming voltage of the antifuse.
It is known that metal-to-metal antifuses will exhibit under specific conditions where excessive current is placed across a programmed antifuse a phenomenon wherein the conductive links will open up or become non-conductive. This failure mode is commonly known as “read disturb” because the excessive parasitic current occurs during the read state of the antifuse.
One factor which contributes to read disturb is the presence of any significant quantity of aluminum in the antifuse conductive links due to electromigration of the aluminum. Metal Barrier layers which serve to block aluminum flow into the antifuse material layer of various materials and various thicknesses have been proposed. The barrier materials, between the aluminum and the amorphous silicon, provide essentially all of the conductive material forming the conductive filament in the programmed antifuse. An antifuse formed with such a barrier metal link material can tolerate more current and have a higher reliability than an antifuse formed without the barrier metal link material.
Another way to overcome this problem is to change the composition of the antifuse material. For example, an amorphous silicon antifuse layer may be replaced with another low-temperature dielectric, such as oxide, nitride, or combinations of oxide and nitride have lower leakage current and higher breakdown voltage. Therefore, to maintain the same breakdown voltage requirements, the thickness of the antifuse dielectric has to be reduced. However, reducing the thickness of the antifuse material layer results in an increase in the capacitance of the antifuse in its unprogrammed state. This increased capacitance has a negative impact on the product speed.
Other materials which are harder and denser than amorphous silicon, such as silicon carbide (SiC) and amorphous carbon (a-C) have been proposed to replace amorphous silicon to reduce the read disturb phenomenon and other problems associated with amorphous silicon metal-to-metal antifuses. It is important to employ these materials at desired programming voltages, and with a minimum of capacitance.
Amorphous carbon has been shown to significantly address the read disturb phenomenon. One problem in employing a-C as the antifuse material layer has been that it can fail to adhere to a metal electrode. Adhesion of the layers in a thin film device typically occurs because there is either ionic bonding at the interface of the films, metallurgical bonding where a chemical reaction between the materials results in a new material, or mechanical adhesion where the adhesion is due to the deposited film hooking onto surface nooks and projections.
When materials in a thin film device do not adhere to one another, a “glue” layer must be employed. In an a-C based antifuse device, the problem of finding a material layer glue is difficult because a suitable material layer must adhere to both the metal electrode and the a-C. Concurrently, the adhesion material of the glue layer employed should have minimal impact on the programming and capacitance characteristics of the antifuse.